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【音视频】星宸SSC9351Q-Linux开发板

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简介

Sigmastar系列芯片-SSC9351Q Linux音视频开发板

简介:Sigmastar系列芯片-SSC9351Q Linux音视频开发板

开源协议

GPL 3.0

创建时间:2023-07-22 11:48:54更新时间:2024-03-06 03:28:33

描述

High Performance Processor Core

 ARM Cortex-A7 Dual Core
 Clock rate up to 1.2GHz
 Neon and FPU
 Memory Management Unit for Linux support
 DMA Engine

Image/Video Processor

 Supports 8/10/12-bit parallel interface for raw data input
 Supports MIPI interface with 2/4 data lanes and 1 clock lane
 Supports one MIPI interface
 Supports sensor interface with both parallel and MIPI
 Supports 8/10-bit CCIR656 interface
 Supports max. 5M (2560x1920) pixels video recording and image snapshot
 Bad pixel compensation
 Temporal-domain Noise Reduction (3DNR)
 Bayer domain Spatial-domain Noise Reduction (2DNR)
 Bayer domain filter to remove purple false color in highlight regions
 Optical black correction
 Lens shading compensation
 Auto White Balance (AWB) / Auto Exposure (AE) / Auto Focus (AF)
 CFA color interpolation
 Color correction
 Gamma correction
 Video stabilization
 High Dynamic Range (HDR) with two exposure frames and de-ghost function
 Frame buffer data compression and decompression to save memory bandwidth
 Wide Dynamic Range (WDR) with local tone mapping

 Flip, Mirror, and Rotation with 90 or 270 degree
 Lens distortion correction (LDC/FishEye)
 Rolling shutter compensation
 Fully programmable multi-function scaling engines

Advanced Color Engine

 Luma gain/offset adjustment
 Supports 2D peaking with user definition filter
 Horizontal noise masking
 Direct Luma Correction (DLC)
 Black/White Level Extension (BLE/WLE)
 IHC/ICC/IBC for chroma adjustment
 Histogram statistics
 Spatial domain IIR filter to reduce noise

H.265/HEVC

 Supports H.265/HEVC main profile
 Supported Prediction Unit (PU) size: 32x32, 16x16, 8x8
 Supported Transform Unit (TU) size: 32x32 to 4x4
 Search range [H: +/-128, V: +/-64]
 Supports up to quarter-pixel
 Supports frame level and MB level rate control
 Supports ROI encoding with custom QP map
 Supports max. 5M with 30 fps encoding

H.264 Encoder

 Supports H.264 baseline, constrained baseline, main, and high profile
 Supports 16x16, 8x8 and 4x4 block sizes
 Search range [H: +/-64, V: +/-32]
 Supports up to quarter-pixel
 Supports frame level and MB level rate control
 Supports ROI encoding with custom QP map
 Supports max. 5M with 30 fps encoding

JPEG Encoder

 Supports JPEG baseline encoding
 Supports YUV422 or YUV420 formats
 Supports max. 5M with 30 fps encoding
 Supports real-time mode and frame encode mode
 Video Encoding Performance
 Supports 5M 30 fps H.265/HEVC encoding
 Supports 5M 30 fps H.264 encoding
 Supports MJPEG up to 5M 30 fps encoding

Deep Learning Accelerator (DLA)

 Pure hardwired accelerator
 Supports various video analysis functions like FD/FR, human detection, MD/OD, object tracking, etc.

Audio Processor

 One stereo ADC for microphone input
 2-pin DMIC input
 One mono DAC for lineout
 Supports 8K/16K/32KHz/48KHz sampling rate audio recording
 Digital and analog gain adjustment
 I2S digital audio input and output with TDM up to 8-ch input and 2-ch output
 NOR/NAND Flash Interface
 Compliant with standard, dual and quad SPI Flash memory components
 High speed clock/data rate up to 108MHz

SD Card/eMMC Interface

 Compatible with SD spec. 2.0, data bus 1/4 bit mode
 Supports eMMC 4.3 interface
 SDIO 2.0 Interface
 Compatible with SDIO spec. 2.0, data bus 1/4 bit mode
 Compatible with SD spec. 2.0, data bus 1/4 bit mode

USB Interface

 One USB 2.0 configurable host or device
− Host mode supports EHCI specification
− Device mode supports up to 8 endpoints
 Supports suspend/hibernation/wake-up power saving mode

DRAM Memory

 Embedded 1Gb or 2Gb 16-bit DDR3 memory with max. 1866Mbps

Connectivity

 USB 2.0 Host Controller could be used for USB Wi-Fi Dongle or Module
 One SDIO 2.0 Host Controller could be used for SDIO Wi-Fi module
 Supports Wake-on-LAN (WOL)
 Supports BT.656 8-bit output with max. 75MHz clock rate (single clock edge)
 Supports BT.656 YUV422 format and progressive mode

Security Engines

 Supports AES/DES/3DES/RSA/SHA-I/SHA256
 Supports secure booting

Real Time Clock (RTC)

 Built-in RTC working with 32.768 KHz crystal
 Alarm interrupt for wakeup
 Tick time interrupt (millisecond)
 Built-in regulator
 Supports low leakage RTC-mode for long battery application

Power Management Unit (PM)

 Built-in LDO to provide both 0.9V and 1.8V power sources
 Built-in RC FRO to generate clock source
 Supports multiple GPIOs for power control and RTC events
 Supports PIR (Passive Infrared Sensor) interface
 Supports ALS (Ambient Light Sensor) interface
 Supports WOS (Wake on Sound) function
 Supports 1.8V serial flash interface for MCP under low power application

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